I’ve done a number of projects involving Xilinx FPGAs and CPLDs, and honestly I’m frustrated with them enough to be interested in trying out one of their competitors. This is pretty rant-y, so take it with a grain of salt but some of my gripes include:
- Simply awful toolchain support. The standard approach is to reverse-engineer the Xilinx file formats and write your own tooling on top of them.
- Update — looks someone else posted a much lengthier blog post about this, which is a good read.
- Terrible software speed. I suppose they care much more about large design teams where the entire synthesis time will be measured in hours, but for a simple hobby project, it’s pretty infuriating that a syntax error still takes a 10 second edit-compile-debug cycle. This is not due to any complexities in the language they support (as opposed to C++ templates, for example), but is just plain old software overhead on their part: it takes 5 seconds for them to determine that the input file doesn’t exist. If you use their new 7-series chips, you can use their new Vivado software which may or may not be better, but rather than learn a new line and software I decided to try the competitor.
- Expensive prices. They don’t seem to feel like they need to compete on price — I’m sure they do for the large contracts, but for the “buy a single item on digikey” they seem to charge whatever the market will bear. And I was paying it, so I guess that’s their prerogative, but it makes me frustrated.
So anyway, I had gone with Xilinx, the #1 (in sales I believe) FPGA vendor, since when learning FPGAs I think that makes sense: there’s a lot of third-party dev boards for them, a lot of documentation, and a certain “safety in numbers” by going with the most common vendor. But now I feel ready to branch out and try the #2 vendor, Altera.
BeMicro CV
I saw a cheap little dev kit for Altera: the BeMicro CV. This is quite a bit less-featured than the Nexys 3 that I have been using, but it’s also quite a bit cheaper: it’s only $50. The FPGA it has is quite a bit beefier as well: it has “25,000 LEs [logic elements]”, which as far as I can tell is roughly equivalent to the Xilinx Spartan-6 LX75. The two companies keep inflating the way they measure the size of their FPGAs so it’s hard to be sure, and they put two totally different quantities in the sort fields in digikey (Xilinx’s being more inflated), but I picked the LX75 (a $100 part) by assuming that “1 Xilinx slice = 2 Altera LEs“, and the Cyclone V on this board has 25k LEs, and the LX75 has 11k slices.
My first experience with Altera was downloading and installing the software. They seem to have put some thought into this and have broken the download into multiple parts so that you can pick and choose what you want to download based on the features you want — a feature that sounds trivial but is nice when Xilinx just offers a monolithic 6GB download. I had some issue right off the bat though: the device file was judged to be invalid by the installer, so when I start up Quartus (their software), it tells me there are no devices installed. No problemo, let’s try to reinstall it — “devices already installed” it smugly informs me. Luckily the uninstaller lets you install specific components, so I was able to remove the half-installed device support, but since the software quality was supposed to be one of their main selling points, this was an ominous beginning.
Once I got that out of the way, I was actually pretty impressed with their software. Their “minimum synthesis time” isn’t much different from Xilinx’s, which I find pretty annoying, and it also takes them a while to spot syntax errors. So unfortunately that gripe isn’t fully satisfied. Overall the software feels snappier though — it doesn’t take forever to load the pin planner or any other window or view. There’s still an annoying separation between the synthesis and programming flows — the tools know exactly what file I just generated, but I have to figure out what it was so that I can tell the programmer what file to program. And then the programmer asks me even time if I would like to save my chain settings.
The documentation seems a bit lighter for Altera projects, especially with this dev board — I guess that’s one drawback of not buying from Digilent. Happily and surprisingly, the software was intuitive enough that I was able to take a project all the way through synthesis without reading any documentation! While it’s not perfect, I can definitely see why people say that Altera’s software is better. I had some issues with the programmer where the USB driver hadn’t installed, so I ended up having to search on how to do that, but once I got that set up I got my little test program on the board without any trouble.
Going forward
So at this point, I have a simple test design that connects some of the switches to some of the LEDs. Cool! I got this up way faster than I did for my first FPGA board; that’s not really a comparison of the two vendors since there’s probably a large experience component, but it’s still cool to see. Next I’ll try to find some time to do a project on this new board — this FPGA is quite a bit bigger than my previous one, so it could possibly fit a reasonable Litecoin miner.
Overall it’s hard to not feel like the FPGA EDA tools are far behind where software build tools are. I guess it’s a much smaller market, but I hope that some day EDA tools catch up.
kmod's blog 
20 responses to “Quick report: Altera vs Xilinx for hobbyists”
Interesting. I’m a couple steps behind where you are, but for somewhat different reasons. I’ve been using Xilinx for almost 40 years now. Their software has always lacked the touch of professional programmers. The first version was written in early Microsoft compiled basic and required a driver that gobbled up have of the available 640 K of memory as a working buffer, pretty much requiring a dedicated computer. But I’ve gotten used to working around their idiosyncrasies, and the quality of the software has improved considerably. I cut them some slack because the task the program does is incredibly complex.
My personal concern is support. I recently migrated to Spartan 6 for a project or two, including the use of Microblaze. I hit two barriers rather quickly. First The communication link I was supposed to use to communicate with the FPGA simply didn’t work. Second, some of the Microblaze compiler features didn’t work correctly. Xilinx has no customer support, only a forum, which proved relatively useless in my case. I did get a distributor FAE involved who was very supportive, and even spent half a day on site trying to address the problems, but it was beyond what he could do, and he never got the factory support he needed to support me. He told me quite frankly that unless I was doing $250 Million a year in business with Xilinx I could not get support from them.
So I’m seriously considering jumping ship. I’m still trying to determine if Altera feels any more need to support the people that make them successful than Xilinx does.
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You are still using ISE? It’s like using windows 3.1 and saying Microsoft sux. Vivado is easily the best EDA tool I’ve used. It’s well worth the time to get familiar with it, and it eclipses quartus now for usability and performance. Where I work, we have interns who never used fpgas before and are productive in vivado in days.
You really should not write an article complaining when you use software five years out of date.
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That’s a bit unfair — Vivado only supports their newest (7-series) parts, which they don’t exactly give away for free. I’ve been thinking about starting to use Artixs now instead of Spartans, but if I’m going to throw away all of the electrical and software familiarity, I decided I might as well try out the competition 🙂
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> but I picked the LX75 (a $100 part) by assuming that “1 Xilinx slice = 2 Altera LEs”,
> and the Cyclone V on this board has 25k LEs, and the LX75 has 11k slices.
Sorry, have to comment this: Completely wrong.
The 93k Flip Flops in the LX75 should already make you suspicious that this is wrong 😉
Slices change from generation to generation and can not be compared (even if you compare Spartan 2/3 to Spartan 6 – the slices in Spartan 6 contain way more logic!).
You have to look at the Logic Cells / Logic Elements count.
LX75 –> 75k LEs/LCs.
LX25 is what you have to compare a 25k Cyclone V to.
But yeah you are right, Xilinx messed it up by not supporting Spartan 6 in newer Vivado tools. They have no comparable small Artix Parts to LX4, LX9…
Vivado is rather nice, but there are many things where you need to use a smaller low cost FPGA…
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It’s confusing, to be sure. “Logic Cells” though is just a marketing number and the companies are free to report it however they would like. It’s also confusing since the companies use the Digikey fields in different ways. Best to go to the source: http://www.xilinx.com/publications/prod_mktg/Spartan6_Product_Table.pdf The spartan 6 LX75 has 11,662 slices and 93,296 flip flops (each slice contains 8 flip flops). The Cyclone V on this board has 9,434 ALMs, or 25k “Logic Elements”. If you can find a good resource on how these are supposed to compare let me know!
You’re right though that the discussion I linked to was about Spartan III’s which had less powerful slices, but it was also comparing to a less powerful altera chip. I did some more searching today and couldn’t find any definitive answers about how to compare the capacities of the two chips. Though here are some additional comparisons of some previous chips:
Click to access wpstxiixlnx.pdf
Click to access fpga-logic-cells_V4_V5.pdf
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For Xilinx I know how it is calculated: Each S6 Slice contains 4 LUTs + 8 FFs
46648 LUTs + 93296 FFs
46648 * 1.6 = 74637 LCs
Xilinx takes into account, that the LUTs are not 4, but 6 Input now (each LUT is a small 64 Bit memory instead of 16 Bit!) and that there is not 1 but 2 FFs per LUT. The older FPGAs (S3, Cyclone IV and before) all had 4 Input LUTs + 1 FF (and less muxes and other things), so the vendors now just multiply it by a certain factor that is changed for each generation.
For the older FPGAs they even calculated the very meaningless “Gate count”. The newer values are way more useful 🙂
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I stumbled upon this article trying to answer the same question. I’ve used ISE a couple years ago with an old S3 dev board, and the experience was painful, compared to software IDE’s. Am now looking to catch up on the market, and since the new Vivado toolchain only supports the new S7 fpga’s, it seems to make sense getting a new low cost Altera dev board.
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Yeah, clearly I dislike ISE too 🙂 In the time since this blog post, though, it looks like some cheap Artix-7 boards have come out (which would work with Vivado). I’m not doing much FPGA stuff at the moment, but if I was I would definitely be interested in checking one of those boards out to test out the new chip + software.
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I found this site because I was having trouble figuring out how Xilinx Microblaze interrupts work. I got C code working reading swiches and controlling lights and flashing patterns so next is interrupts. I can’t believe there aren’t a few standard examples I could adapt to use on my Artix-7 based basys-3 board. There must be standard examples I haven’t found. Previously I made an Apple II emulator on digilent’s Nexsys-2 board with a Russian 6502 module. That was all Verilog.. no SDK no microblaze.
Looking at .h and .c files in generated board support directory and also looking at documentation included with Vivado and SDK which is mainly a repeat of looking at source code has gotten me familiar with the pieces. There are still big holes in my understanding. I need the big picture. Xilinx has some long documents about things which seem nearly useless. They never have examples and just rammble on about details. Only good for referencing details.
A repository of small examples using microblaze would be great. Does one exsit?
Please Help!!
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I think this is one of those “they only expect large customers who already know how these things work” kind of things. There definitely seems to be a lot of very basic knowledge that they don’t feel the need to provide. Sorry that I don’t have it either!
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Yeah, I’ve been stuck with ISE WebPack for a long time, with large gaps where I couldn’t use it. I had it originally on an old PIII system, but it failed (I don’t normally use Windows, but I keep a dedicated Windows machine for Xilinx software, and a few other things). Eventually I got an old P4 system, but it didn’t have a pro version of Windows. I event ally got XP installed onto it, and got the software up and running again.
Now I have my primary machine, a quad 3.5 GHz i7 with 32 GB RAM on a Gigabyte motherboard, dual booting Mac OS and Windows 10 Pro, set up… and by set up, I mean it took forever to download the now 8 GB of install files, then I couldn’t get in to the licensing server to activate it. When I came back in a day or two to activate it, that worked fine, but now, I discover the open and save buttons seem to cause a crash to desktop, or something… It’s like the program just closes…
I… I need open and save…
I’ll also agree, the forums are useless… I posted a question asking if the licensing server was down, or if maybe I had a connection or configuration issue that was preventing me from connecting. Clearly stated I was running Windows 10 Pro, and that the licensing support page was down in Chrome as well…
They responded by linking me to artcles on setting up server based licensing distribution, setting up licensing on Linux, and all around ignoring the actual main question… Are the servers down, if they are, Ill wait rather than pull my hair out wondering.
After the servers came back up, I specifically marked my own reply as the best answer… “Servers were down, and no useful help came from support staff”
Now to solve why this 17 GB installed piece of software has decided to forget how to use open and save buttons…
I’d consider moving on, trying something newer. Viv.. err… virginia… vivid… Geraldo… Ah! Vivaldo! That’s the one! 😛 Honestly though, I’m sitting on a stock of XC95xx chips, and as far as I can see Vivaldo does not support them. For hobbyist use, changing out the stock of chips is absurd, when all my projects are low logic count projects, all done with the schematic editor to replace glue logic and such. I got a lot of those chips in bulk lots, so I got them for a good deal. My needs haven’t changed, so I’m stuck with ISE.
I’d be curious if there are any hobbyist friendly CPLD development tools and product lines, cause if I do deplete this supply, I’ll be probably wanting to move on.
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Lattice could be a good option – easy to use.
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ISE is having a problem in Windows 10 64 bit version as mentioned above by richfiles. I also faced a lot of problem but found a problem in the ‘libportability.dll’ which is not at the expected place according to Windows 10 64 bit version. My problem was solved by youtube.
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I was planning to buy a development board but was little confused in terms of Xylinx and Altera based FPGAs and Design suites. Now I am quiet clear to go with Altera.
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To the OP – I’ve found this blog interesting – coming myself from the point where I felt intrigued enough to investigate FPGAs, and bought a Cyclone IV dev board to play with. I’ve since realised there’s two big camps with Altera and Xilinx; my own needs are basic, but I’m keen to follow a path that can realise a sensible development environment for home-tinkering. Now that you’ve dipped your toe in the Altera pond for a couple of years, would you still recommend Altera/Quartus over Xilinx considering my needs are entry-level in terms of capability and price? My concern lies mainly in learning a toolchain, which might ultimately be the wrong one.
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I haven’t done as much FPGA stuff since I wrote this post, but I’ve stayed more on the Xilinx actually — I bought a Zynq (Xilinx) board recently. I’m not super up to date in this space, but I’d say that if you already bought an Altera board, you don’t have anything to worry about going with that! I think the two ecosystems are more similar than they are different, especially in the beginning, so most of the knowledge is transferable.
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Hello All,
I have been using Xilinx, Altera and Actel since 2001. I have seen tools and worked with them since Xilinx ISE 3.1 days. I am now using Vivado. I have also used Quartus tools as well as Libero IDE. Not just logic design, but also SDK companions of these tools.
Each have their own pros and cons. However if you want to play in this field for a long time then it becomes serious of what you choose to start with. Consider migrating projects across versions, devices and also partitioning/re-partitioning because of SoC chips, timing constraints, worrying about post PAR timing closure etc. etc. On the SDK, consider compilers, RTOS integration, Linux OS (Yocto/ Petalinux) and its compatibility etc etc.
I will not talk about Microsemi/Libero because that is a slightly different ballgame.
Between Xilinx and Altera, Altera wins, hands down. Quartus-II may not be as fancy as Vivado but it works and there are a plenty of intuitive design/test/validation approaches when you get onto a serious and complex project. Sad to see Xilinx tools still have bugs as they used to have back in ISE 3.1 days. That doesn’t mean Altera is doing great, but at least they are better than Xilinx. I have not calculated exactly, but there is at least 30-35% productivity increase across devices, tool versions and projects when you use Altera devices and tools.
Documentation wise, Altera wasn’t that great until 2009-2010 but later they have improved a lot and now I would say on par with Xilinx. On the other hand Xilinx started going the other direction. Suppose if you want to torubleshoot and find some solution, you would easily open 7-8 documents of Xilinx while you can do the same with 2-3 documents in Altera, just an example. Xilinx is pouring their website with more documents but many of them not in the same place relating to what the ‘user’ wants to know and understand.
I like Microsemi too, especially after working with their SF2/IGLOO2 devices. The only disadvantage for me is the device cost of Microsemi. A similar capacity and power Microsemi device can be replaced by an Altera/Xilinx devices for 60-70% of the total cost (including config flash). End of the day customers are sensitive to cost too, in many applications. Of course when it is for radiation tolerant requirements, Microsemi does the job, except for the lack of soft-core processors in many of their FPGAs.
Xilinx is better at marketing than Altera. Intel may change that, not sure. Whether it is giving a different name for their FPGA SoCs – as Zynq (while Altera simply called it as C5-SoC), or using fancy terminologies like Vivado (and messing up with the project migrations) Xilinx does a better job.
Not sure it is just me, but whoever uses Xilinx has no answer when you ask them why Xilinx. Many a times it is just that the organization / previous projects have used Xilinx. But whenever you ask an Altera user, you will get a professional response indicating why Altera is better and not Xilinx.
Try doing a critical timing closure in Artix vs Cyclone 5 for the same design. Try compiling linux from source and modifying device tree and writing kernel module, integrating with the logic using Zynq and then using C5-SoC. Try using exhaustive compiler options etc with both. Then try migrating projects across devices and tool versions. You can yourself see whatever I said above.
Hey, after all, the engineers in those companies are also human beings. So, no need to worry!!
Just for the lack of FPGA chip designs and the kind of investments that are required to do the whole chain of development environment, there are no “big” open source in this field. This should and will change someday by someone!!
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Wow, thanks for the detailed comment! I’m glad to hear that I’m not just being overly harsh or if there was something that I wasn’t understanding. I hope that FPGAs become more mainstream, and then maybe we will see the tooling situation improve.
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Why let a thread die?
Since this was originally a post for hobbyists, I was wondering if anyone had any luck using Cypress Lattice and their toolset?
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Yes – and I think for hobbyists it is fine and easy to use. They also have small FPGA, that work like CPLD.
ispmach™ 4000ze pico or the Mach XO2 – sub 100 usd dev boards.
And also have a look at: https://www.latticesemi.com/Products.aspx#_D5A173024E414501B36997F26E842A31
Any one else have inputs on the Lattice ecosystem?
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